{"id":2741,"date":"2023-03-28T12:17:40","date_gmt":"2023-03-28T10:17:40","guid":{"rendered":"https:\/\/www.lvdsystems.eu\/?post_type=al_product&#038;p=2741"},"modified":"2023-03-28T12:18:19","modified_gmt":"2023-03-28T10:18:19","slug":"av143-high-speed-data-conversion","status":"publish","type":"al_product","link":"https:\/\/www.lvdsystems.eu\/index.php\/product\/av143-high-speed-data-conversion\/","title":{"rendered":"AV143 &#8211; High-Speed data conversion"},"content":{"rendered":"<h2>Benefits &amp; features<\/h2>\n<ul>\n<li>Dual 3.2 Gsps \/ Single 6.4 Gsps 12-bit ADC<\/li>\n<li>Dual 3.2 Gsps \/ Single 6.4 Gsps 12-bit DAC<\/li>\n<li>One Ultra Low jitter clock synthesizer<\/li>\n<li>External or internal sampling clock<\/li>\n<li>External or internal sampling clock reference<\/li>\n<li>User programmable Xilinx<sup>\u00ae<\/sup>\u00a0Virtex<sup>\u00ae<\/sup>\u00a0Ultrascale+\u2122 VU7P\/VU9P\/VU13P FPGA<\/li>\n<li>2x 1G64 DDR4-2666 SDRAM<\/li>\n<li>3U OpenVPX standard compliant<\/li>\n<li>Air cooled and Conduction cooled rugged versions<\/li>\n<\/ul>\n<p><strong>12-bit 3.2\/6.4 Gsps ADC<\/strong><br \/>\nThe AV143 Analog to Digital conversion is performed by one Texas Instruments ADC12DL3200 12-bit 3.2\/6.4\u00a0Gsps ADC<br \/>\nThe AV143 provides two front panel SMPM connectors for analog input.<br \/>\nSingle ended input signals are AC coupled with an input bandwidth from 10 MHz to more than 8 GHz with TBD dBm input level.<\/p>\n<p><strong>12-bit 3.2\/6.4 Gsps DAC<\/strong><br \/>\nThe AV143 Digital to Analog conversion is performed by one Texas Instruments DAC12DL3200 12-bit 3.2\/6.4\u00a0Gsps DAC.<br \/>\nThe AV143 provides two front panel SMPM connectors for analog output.<br \/>\nSingle ended output signals are AC coupled with an output bandwidth from 10 MHz to more than 8 GHz with TBD dBm output level (NRZ).<\/p>\n<p><strong>Clock<\/strong><br \/>\nThe AV143 provides one ultra-low jitter clock synthesizer locked on a 100 MHz internal reference. The AV143 supports a 10 to 500\u00a0MHz external reference input from a front panel SMPM connector. A reference output is available on a front panel SMPM connector.<br \/>\nAn external clock input for the ADC and DAC is supported from one front panel SMPM connector.<br \/>\nExternal clock frequencies from 1.6\u00a0GHz to 6.4 GHz are supported.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The AV143 is an High-Speed data conversion and signal processing solutions based on the VITA 46, VPX standard<\/p>\n","protected":false},"featured_media":2742,"template":"","al_product-cat":[23,12,20],"class_list":{"0":"post-2741","1":"al_product","2":"type-al_product","3":"status-publish","4":"has-post-thumbnail","6":"al_product-cat-adc-dac","7":"al_product-cat-apissys","8":"al_product-cat-vpx","9":"czr-hentry"},"aioseo_notices":[],"_links":{"self":[{"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/al_product\/2741","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/al_product"}],"about":[{"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/types\/al_product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/media\/2742"}],"wp:attachment":[{"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/media?parent=2741"}],"wp:term":[{"taxonomy":"al_product-cat","embeddable":true,"href":"https:\/\/www.lvdsystems.eu\/index.php\/wp-json\/wp\/v2\/al_product-cat?post=2741"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}